An integration circuit 10, in which an amplifier and an integration capacitor are connected in parallel between an input terminal and an output terminal, has a means of switching the capacitance of the integration capacitor to either one of Cf_1 to CfK and stores the charge output from a photodiode PD at the integration capacitor to output an integrated voltage according to the amount of the stored charge. 積分回路10は、アンプと積分容量部とが入力端子と出力端子との間に並列的に設けられ、積分容量部の容量値をCf_1〜Cf_Kの何れかに切り替える容量値切替手段を有し、フォトダイオードPDから出力された電荷を入力して積分容量部に蓄積し、この蓄積した電荷の量に応じた値の積分電圧を出力する。 - 特許庁