byte d7 d6 d5 d4 d3 d2 d1 d0 1 1 0 0 dxs dys lb mb rb 2 0 dx6 dx5 dx4 dx3 dx2 dx1 dx0 3 0 dy6 dy5 dy4 dy3 dy2 dy1 dy0 FILES
center;r c c c c c c c c.byte d7 d6 d5 d4 d3 d2 d1 d01 1 0 0 dxs dys lb mb rb2 0 dx6 dx5 dx4 dx3 dx2 dx1 dx03 0 dy6 dy5 dy4 dy3 dy2 dy1 dy0ファイル - JM
Capacitors CYs and CYh, and CYl and Cyg are formed in the switching elements Ys and Yh, and Yl and Yg, a diode Dys is connected in a reverse direction between the connection point of the switching elements Ys and Yh and a ground line O, and a diode Dyg is connected in a forward direction between the connection point of the switching element Yl and Yg and the ground line O. スイッチング素子Ys,Yh,Yl,Ygには各々キャパシタCYs,CYh,CYl,CYgが形成されており,ダイオードDysがスイッチング素子Ys,Yhの接続点と接地線0との間に逆方向に連結され,ダイオードDygがスイッチング素子Yl,Ygの接続点と接地線0との間に順方向に連結されている。 - 特許庁
Copyright (c) 2001 Robert Kiesling. Copyright (c) 2002, 2003 David Merrill. The contents of this document are licensed under the GNU Free Documentation License. Copyright (C) 1999 JM Project All rights reserved.