「mips」の共起表現一覧(1語右で並び替え)
該当件数 : 24件
| urrently supports the CPUs: AMD64, ARM, i80486, | MIPS, and PowerPC. |
| All of Alpha, PowerPC, | MIPS, and ARM have LL/SC instructions: ldl_l/stl_c a |
| the Lego Mindstorms RCX, Arduino, IA-32, SPARC, | MIPS, and the Cell BE on Linux, OSX, Windows and DOS |
| id A. Patterson, the principal designers of the | MIPS and the Berkeley RISC designs (respectively), t |
| Targets like PowerPC and | MIPS architecture works under experimental level. |
| Sx (DataCenter/OSx) was an operating system for | MIPS based systems developed by Pyramid Technology. |
| In 1984, he used his sabbatical year to found | MIPS Computer Systems Inc. to commercialize his rese |
| co-founder of the first commercial RISC company | MIPS Computer Systems, the founder of Clarity Wirele |
| Rucksacks and Material Input per Unit Service ( | MIPS) concepts, as measures of the ecological stress |
| It utilized a 66MHz | MIPS CPU with 8MB of RAM and 16MB of built-in Flash |
| ed solvers: Compared with CPLEX, "Gurobi solves | MIPs faster on single-processor machines..., Gurobi |
| It was extended to 33 MHz, 5.4 | MIPS for the DragonBall VZ (MC68VZ328) model, and 66 |
| (PowerPC for the Macintosh, SPARC for Sun, and | MIPS for SGI). |
| f the Multiband Imaging Photometer for Spitzer ( | MIPS) Guaranteed Time Oberservation (GTO) team led b |
| e paravirtualized Linux running on x86, ARM and | MIPS hardware. |
| strument for the Hubble Space Telescope and the | MIPS instrument for the Spitzer Space Telescope. |
| MIPS maintains support and advice in various areas, | |
| clock of 110 to 200 MHz and can process at 266 | MIPS or more. |
| collection would have been maintained by a 1.5 | MIPS RISC-based computer system capable of processin |
| It generates code for a | MIPS simulator, SPIM. |
| This CPU can run at 0.5 | MIPS to 3 MIPS depending on the operating speed (fro |
| isplays processing speeds of 900 MFLOPS or 4000 | MIPS while operating at 5 watts. |
| DLX is essentially a cleaned up and simplified | MIPS, with a simple 32-bit load/store architecture. |
| r CISC, RISC, and VLIW architectures, including | MIPS, x86, IA-64, ARM, and others. |
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