「risc」の共起表現一覧(1語右で並び替え)
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n that it can generate efficient code for CISC, | RISC, and VLIW architectures, including MIPS, x86, I |
he 88000 was Motorola's attempt at a home-grown | RISC architecture, started in the 1980s. |
l design tools and is currently concentrated on | RISC architecture. |
He is considered by many to be "the father of | RISC architecture." |
he Research Institute for Symbolic Computation ( | RISC) at Johannes Kepler University. |
pment for Acorn Computers (U.K.), where the ARM | RISC chip was designed, and President of the Acorn R |
acintosh), a co-founder of the first commercial | RISC company MIPS Computer Systems, the founder of C |
The 88000 (m88k for short) is a | RISC instruction set architecture (ISA) developed by |
M is a 32-bit reduced instruction set computer ( | RISC) instruction set architecture (ISA) developed b |
e VMS Macro language, supporting the underlying | RISC instruction set, and was called Macro-64. |
Simply | RISC is a fabless semiconductor company based in Bri |
Only the Acorn | RISC Machine came close to meeting all these demands |
It was known as the Advanced | RISC Machine, and before that as the Acorn RISC Mach |
eserved by convention, such as on the PDP-11 or | RISC machines. |
It is built around a 32-bit | RISC Microblaze processor, realized on a Xilinx Spar |
Current versions of | RISC OS still contain a BBC BASIC interpreter. |
On 4 July 2003, Castle bought the rights to | RISC OS from Pace Micro Technology and released the |
rly worked for Pace, the company which acquired | RISC OS after Acorn's demise. |
RISC OS Open Ltd. (also referred to as ROOL) is a li | |
d on 19 May 2007 to coincide with the Wakefield | RISC OS show. |
, notable for work in developing and supporting | RISC OS software and named as a leading expert on UF |
It is inspired by the user interface of | RISC OS (not to be confused with RISC/os). |
i ST (under GEMDOS) and Acorn Archimedes (under | RISC OS), c.f. |
which runs on a variety of platforms including | RISC OS, AmigaOS and Unix-like systems. |
ng the process of publishing the source code to | RISC OS. |
orn-branded range of desktop computers that run | RISC OS. |
for | RISC OS: Gavin Wraith's RISC OS page |
bought the rights to continue production of the | Risc PC and A7000+ computers under the Acorn brand n |
The DLX is a | RISC processor architecture designed by John L. Henn |
onnection as the port to DIGITAL's 64-bit Alpha | RISC processor was in process. |
velop, and the second incarnation was instead a | RISC processor. |
r Systems Inc. to commercialize his research in | RISC processors. |
is not possible to port ZSNES to devices using | RISC processors. |
PU, used in Apple's abortive first attempt at a | RISC target platform. |
on of IBM PCs, and was simultaneously embracing | RISC technology moving towards high-end processors, |
In the current migration from | RISC to Intel Itanium 2 TAL and pTAL has been replac |
formation of the RNA-induced silencing complex ( | RISC), whose catalytic component argonaute is an end |
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