英和和英

出典:『Wikipedia』 (2010/12/20 13:50 UTC 版)

英語による解説

引用

In VHDL simulations, all signal assignments occur with some infinitesimal delay, known as delta delay. Technically, delta delay is of no measurable unit, but from a hardware design perspective one should think of delta delay as being the smallest time unit one could measure, such as a femtosecond(fs).