双晶欠陥の英語

ウィスカ状結晶性シリコンは、双晶を形成しながら（積層欠陥を導入しながら）成長し、ウィスカ状結晶性シリコン成長方向と垂直な面内（輪切り面内）に双晶面の法線方向＜１１１＞が必ず含まれるように初期核が配置される。例文帳に追加

Whisker-like crystalline silicon grows while forming a twin crystal (introducing stacking faults), and an initial nucleus is arranged so that the normal direction <111> of the twin crystal plane is always included in the plane perpendicular to the growth direction of whisker-like crystalline silicon and in the perpendicular plane (in a transverse cross section). - 特許庁

ａ軸およびｃ軸の双方向の欠陥が非常に少ない４Ｈ型ＳｉＣ単結晶が得られる４Ｈ型ＳｉＣ単結晶の製造方法を提供する。例文帳に追加

To provide a method for manufacturing a 4H-type SiC single crystal having very few defects in both the axis a and axis c directions. - 特許庁

キャリア濃度が低い領域において、転位密度を低減しつつ双晶欠陥の発生を抑制したＩｎＰ単結晶およびその製造方法を提供する。例文帳に追加

To provide an InP single crystal which is reduced in twin defects in an area with low carrier concentration while reducing dislocation density therein. - 特許庁

エピタキシャル成長以外の付加的な工程を必要とせず、かつエピタキシャル成長させた結晶内に生じる反位相領域境界面や双晶のような面欠陥を低減し得る化合物半導体結晶基材及びその製造方法を提供すること。例文帳に追加

To provide a compound semiconductor crystal base material which is produced by an epitaxial growth process without requiring an additional process and reduces planar defects such as anti-phase area boundary planes or twins, which are formed in the epitaxially grown crystal, and to provide a method for producing the same. - 特許庁

活性層は、ＧａＩｎＮ障壁層３６と、ＧａＩｎＮ井戸層３８との量子井戸構造として構成されて、障壁層と井戸層の上面もしくは下面もしくはその双方との間にＡｌＧａＮ層からなる面状結晶欠陥抑制層４０を介在させている。例文帳に追加

In the GaN-based semiconductor laser element, an active layer is formed as a quantum well structure including a GaInN barrier layer 36 and a GaInN well layer 38, and a planar crystal defect prevention layer 40 made of an AlGaN layer is provided on an upper surface or a lower surface, or between both the surfaces of the barrier layer and the well layer. - 特許庁

行走査電極駆動回路を２ブロック配置した液晶表示装置において、順次走査と飛び越し走査の双方の表示信号に対応することができるようにし、かつ順次走査における上下の連結欠陥の発生を解消する。例文帳に追加

To enable a liquid crystal display device to cope with both of the display signals of a sequential scanning and an interlaced scanning and also to dissolve the generation of the connection defect of up-and-down scanning in the sequential scanning in a liquid crystal display device in which two blocks of row scanning electrode driving circuits are arranged. - 特許庁